verilog, 204 bytes

Result

AC

Duration

1074ms

Code [DL]

module a;time w,h,t;initial begin t=$fscanf('h8000_0000,"%d%d",h,w);repeat(w)$write("*");$display();repeat(h-2)begin $write("*");repeat(w-2)$write(" ");$display("*");end repeat(w)$write("*");end endmodule

stdin

17
88

stdout

****************************************************************************************
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
*                                                                                      *
****************************************************************************************

stderr